Intel

5000 Family

These devices are CMOS technology.

• 5101-1024-bit (256 × 4) Static RAM
• 5201/5202-LCD Decoder-Driver
• 5203 LCD Driver
• 5204-Time Seconds/Date LCD Decoder-Driver
• 5234-Quad CMOS-to-MOS Level Shifter and Driver for 4K NMOS RAMs
• 5235-Quad CMOS TTL-to-MOS Level Shifter and Driver for 4K NMOS
• 5244-Quad CCD Clock Driver
• 5801-Low Power Oscillator-Divider
• 5810-Single Chip LCD Time/Seconds/Date Watch Circuit
• 5814 4-Digit LCD.
• 5816 6-Digit LCD.
• 5830 6-Digit LCD + Chronograph Business Sold.

The 16-bit processors: origin of x86

8086

• Introduced June 8, 1978
• Clock rates:
  • 4.77 MHz with 0.33 MIPS
  • 8 MHz with 0.66 MIPS
  • 10 MHz with 0.75 MIPS
• The memory is divided into odd and even banks. It accesses both the banks simultaneuosly in order to read 16 bit of data in one clock cycle.
• Bus Width 16 bits data, 20 bits address
• Number of Transistors 29,000 at 3 µm
• Addressable memory 1 megabyte
• Up to 10X the performance of 8080 (typically lower)
• Used in portable computing, and in the IBM PS/2 Model 25 and Model 30. Also used in the AT&T PC6300 / Olivetti M24, a popular IBM PC-compatible (predating the IBM PS/2 line.)
• Used segment registers to access more than 64 KB of data at once, which many programmers complained made their work excessively difficult.

8088

• Introduced June 1, 1979
• Clock rates:
  • 4.77 MHz with 0.33 MIPS
  • 8 MHz with 0.75 MIPS
• Internal architecture 16 bits
• External bus Width 8 bits data, 20 bits address
• Number of Transistors 29,000 at 3 µm
• Addressable memory 1 megabyte
• Identical to 8086 except for its 8 bit external bus (hence an 8 instead of a 6 at the end)
• Used in IBM PCs and PC clones

MCS-86 Family

• 8086-CPU
• 8087-Math-CoProcessor
• 8088-CPU
• 8089-Input/Output Co-Processor
• 8208-Dynamic RAM Controller
• 8284-Clock Generator & Driver
• 8286-Octal Bus Transceiver
• 8287-Octal Bus Transceiver
• 8288-Bus Controller
• 8289-Bus Arbiter
• 80130-iRMX 86 Operating System Processors
• 80186-CPU
• 80188-CPU
• 80286-CPU
• 80287-Math-Coprocessor
• 82050-Communication Controller
• 82062-Winchester Disk Controller (ST-506)
• 82064-Floppy Disk Controller
• 82091-Advanced Integrated Peripheral
• 82188-Bus Controller
• 82288-Bus Controller
• 82389-Message Passing Coprocessor
• 82503-Dual Serial Transceiver
• 82510-Communication Controller
• 82530-Serial Communication Controller
• 82577-PCI LAN Controller
• 82586-IEEE 802.3 EtherNET LAN CoProcessor
• 82596-LAN-CoProcessor
• 82720-Graphics Display Controller
• 82730-Text Coprocessor
• 80386-CPU
• 80321-I/O Processor
• 80387-Math-CoProcessor

80186

• Introduced 1982
• Clock rates
  • 6 MHz with > 1 MIPS
• Number of Transistors 29,000 at 2 µm
• Included two timers, a DMA controller, and an interrupt controller on the chip in addition to the processor (These were at fixed addresses which differed from the IBM PC, making it impossible to build a 100% PC-compatible computer around the 80186.)
• Added a few opcodes and exceptions to the 8086 design; otherwise identical instruction set to 8086 and 8088.
• Used mostly in embedded applications – controllers, point-of-sale systems, terminals, and the like
• Used in several non-PC-Compatible MS-DOS computers including RM Nimbus, Tandy 2000
• Later renamed the iAPX 186

80188

• A version of the 80186 with an 8-bit external data bus
• Later renamed the iAPX 188

80286

• Introduced February 1, 1982
• Clock rates:
  • 6 MHz with 0.9 MIPS
  • 8 MHz, 10 MHz with 1.5 MIPS
  • 12.5 MHz with 2.66 MIPS
  • 16 MHz, 20 MHz and 25 MHz available.
• Bus Width: 16 bit data, 24 bit address.
• Included memory protection hardware to support multitasking operating systems with per-process address space
• Number of Transistors 134,000 at 1.5 µm
• Addressable memory 16 MB (16 MB)
• Added protected-mode features to 8086 with essentially the same instruction set
• 3-6X the performance of the 8086
• Widely used in IBM-PC AT and AT clones contemporary to it

32-bit processors: the non-x86 microprocessors

iAPX 432

• Introduced January 1, 1981 as Intel's first 32-bit microprocessor
• Multi-chip CPU; Intel's first 32-bit microprocessor
• Object/capability architecture
• Microcoded operating system primitives
• One terabyte virtual address space
• Hardware support for fault tolerance
• Two-chip General Data Processor (GDP), consists of 43201 and 43202
• 43203 Interface Processor (IP) interfaces to I/O subsystem
• 43204 Bus Interface Unit (BIU) simplifies building multiprocessor systems
• 43205 Memory Control Unit (MCU)
• Architecture and execution unit internal data paths 32 bit
• Clock rates:
  • 5 MHz
  • 7 MHz
  • 8 MHz

i960 aka 80960

• Introduced April 5, 1988
• RISC-like 32-bit architecture
• Predominantly used in embedded systems
• Evolved from the capability processor developed for the BiiN joint venture with Siemens
• Many variants identified by two-letter suffixes.

80386SX (chronological entry)

• Introduced June 16, 1988

80376 (chronological entry)

• Introduced January 16, 1989

i860 aka 80860

• Introduced February 27, 1989
• RISC 32/64-bit architecture, with pipeline characteristics very visible to programmer
• Used in Intel Paragon massively parallel supercomputer

XScale

• Introduced August 23, 2000
• 32-bit RISC microprocessor based on the ARM architecture
• Many variants, such as the PXA2xx applications processors, IOP3xx I/O processors and IXP2xxx and IXP4xx network processors