Intel

• Intel Extended Memory 64 Technology
• Mostly compatible with AMD's AMD64 architecture
• Introduced Spring 2004, with the Pentium 4F (D0 and later P4 steppings)

[edit] Pentium 4F

• Prescott-2M built on 0.09 µm (90 nm) process technology
• 2.8–3.8 GHz (model numbers 6x0)
• Introduced February 20, 2005
• Same features as Prescott with the addition of:-
  • 2 MB cache
  • Intel 64bit
  • Enhanced Intel SpeedStep Technology (EIST)
• Cedar Mill built on 0.065 µm (65 nm) process technology
• 3.0–3.6 (model numbers 6x1)
• Introduced January 16, 2006
• die shrink of Prescott-2M
• Same features as Prescott-2M

[edit] Pentium D

• Dual-core microprocessor
• No Hyper-Threading
• 800(4×200) MHz front side bus
• LGA 775 (Socket T)

• Smithfield – 90 nm process technology (2.66–3.2 GHz)
  • Introduced May 26, 2005
  • 2.66–3.2 GHz (model numbers 805–840)
  • Number of Transistors 230 million
  • 1 MB × 2 (non-shared, 2 MB total) L2 cache
  • Cache coherency between cores requires communication over the FSB
  • Performance increase of 60% over similarly clocked Prescott
  • 2.66 GHz (533 MHz FSB) Pentium D 805 introduced December 2005
  • Contains 2x Prescott dies in one package

• Presler – 65 nm process technology (2.8–3.6 GHz)
  • Introduced January 16, 2006
  • 2.8–3.6 GHz (model numbers 915–960)
  • Number of Transistors 376 million
  • 2 MB × 2 (non-shared, 4 MB total) L2 cache
  • Contains 2x Cedar Mill dies in one package

[edit] Pentium Extreme Edition

• Dual-core microprocessor
• Enabled Hyper-Threading
• 800(4×200) MHz front side bus

• Smithfield – 90 nm process technology (3.2 GHz)
  • Variants
    • Pentium 840 EE – 3.20 GHz (2 × 1 MB L2)

• Presler – 65 nm process technology (3.46, 3.73)
  • 2 MB × 2 (non-shared, 4 MB total) L2 cache
  • Variants
    • Pentium 955 EE – 3.46 GHz, 1066 MHz front side bus
    • Pentium 965 EE – 3.73 GHz, 1066 MHz front side bus

[edit] Xeon

• Nocona
  • Introduced 2004

• Irwindale
  • Introduced 2004

• Cranford
  • Introduced April 2005
  • MP version of Nocona

• Potomac
  • Introduced April 2005
  • Cranford with 8 MB of L3 cache

• Paxville DP (2.8 GHz)
  • Introduced October 10, 2005
  • Dual-core version of Irwindale, with 4 MB of L2 Cache (2 MB per core)
  • 2.8 GHz
  • 800 MT/s front side bus

• Paxville MP – 90 nm process (2.67 – 3.0 GHz)
  • Introduced November 1, 2005
  • Dual-Core Xeon 7000 series
  • MP-capable version of Paxville DP
  • 2 MB of L2 Cache (1 MB per core) or 4 MB of L2 (2 MB per core)
  • 667 MT/s FSB or 800 MT/s FSB

• Dempsey – 65 nm process (2.67 – 3.73 GHz)
  • Introduced May 23, 2006
  • Dual-Core Xeon 5000 series
  • MP version of Presler
  • 667 MT/s or 1066 MT/s FSB
  • 4 MB of L2 Cache (2 MB per core)
  • LGA 771 (Socket J).

• Tulsa – 65 nm process (2.5 – 3.4 GHz)
  • Introduced August 29, 2006
  • Dual-Core Xeon 7100-series
  • Improved version of Paxville MP
  • 667 MT/s or 800 MT/s FSB